Identical instructions but of opposite conditions in the instruction stream

https://blueprints.launchpad.net/gcc-linaro/+spec/equivalent-opposite-condition-detection

typedef unsigned char uint8_t;
typedef struct {
    int high;
    int bits; /* stored negated (i.e. negative "bits" is a positive number of
                 bits left) in order to eliminate a negate in cache refilling */
    const uint8_t *buffer;
    const uint8_t *end;
    unsigned int code_word;
} VP56RangeCoder;
extern const uint8_t ff_vp56_norm_shift[256];
extern unsigned int bytestream_get_be16 (const uint8_t ** buffer);

unsigned int __attribute__((noinline)) vp56_rac_renorm(VP56RangeCoder *c)
{
    int shift = ff_vp56_norm_shift[c->high];
    int bits = c->bits;
    unsigned int code_word = c->code_word;

    c->high   <<= shift;
    code_word <<= shift;
    bits       += shift;
    if(bits >= 0 && c->buffer < c->end) {
        code_word |= bytestream_get_be16(&c->buffer) << bits;
        bits -= 16;
    }
    c->bits = bits;
    return code_word;
}


 int vp56_rac_get_prob(VP56RangeCoder *c, uint8_t prob)
{
    unsigned int code_word = vp56_rac_renorm(c);
    unsigned int low = 1 + (((c->high - 1) * prob) >> 8);
    unsigned int low_shift = low << 16;

    if (code_word >= low_shift)
    {
     c->high = c->high - low ;
     c->code_word = code_word - low_shift;
    }
    else
    {
    c->high = low;
    c->code_word = low_shift;
    }

    return (code_word >= low_shift);
}

Conditional stores of the opposite conditions exist in the final instruction stream under quite a few circumstances with Linaro GCC 4.6 . This came from the vp8 benchmark.

Update: Unfortunately the problem with this case in Linaro GCC 4.6 is that we end up generating this case where the instructions of opposite conditions are within basic blocks, so standard tail merging in if-conversion isn't going to catch these cases. It might be worth looking at some of this when we look at instructions of opposite conditions and move them out or sink them but we've got to be careful around memory accesses.

WorkingGroups/ToolChain/GCCPerformance/EquivalentOppositceConditionDetection (last modified 2013-05-22 10:57:43)